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Introduction to Digital System Design Using VHDL and Programmable Logic (3 op)

Toteutuksen tunnus: TX00FB54-3001

Toteutuksen perustiedot


Ilmoittautumisaika
02.05.2022 - 06.08.2022
Ilmoittautuminen toteutukselle on päättynyt.
Ajoitus
08.08.2022 - 12.08.2022
Toteutus on päättynyt.
Opintopistemäärä
3 op
Toteutustapa
Lähiopetus
Yksikkö
(2019-2024) ICT ja tuotantotalous
Toimipiste
Leiritie 1
Opetuskielet
englanti
Paikat
0 - 24
Koulutus
Degree Programme in Information Technology
Tieto- ja viestintätekniikan tutkinto-ohjelma
Opettajat
Carsten Gremzow
Ryhmät
ICTSUMMER
ICT Summer School
Opintojakso
TX00FB54
Toteutukselle TX00FB54-3001 ei löytynyt varauksia!

Tavoitteet

Student will learn principles of esigning complex digital systems by means of hardware description languages and design automation tools specifically for field programmable logic devices (FPGAs). Student will know how to use the industry standard hardware description language VHDL for simulation and synthesis purposes. Student will clearly comprehend the relationship between VHDL constructs and their corresponding hardware components.In addition, student will be able to design efficient and synthesizable VHDL descriptions both of combinatorial (e.g. multiplexors, decoders, adders etc.) and sequential (registers, synchronous automata etc.) hardware.Student will learn how to implement and test a simple yet complete processor including basic peripheral components running the famous ,,Hello World'' program by the end of the course.

Sisältö

- overview and brief background / history of VHDL / HDLs in general
- designing combinatorial logic (decoder, encoder, multiplexers etc,) using sequential and concurrent constructs (processes) on behavorial level
- implementing arithmetic circuits
- structural design
- sequential logic (mealy and more automata, look ahead design, one and two process style)
- designing / infering memory (register, latches, multiport memory)
- basic design resuse, use of intellectual property (IPs)
- circuit validation using testbenches
- efficient VHDL design specifically for programmable logic (FPGas)

Arviointikriteeri, hyväksytty/hylätty

Successful completion of lab assignments.

Esitietovaatimukset

- basic knowledge of digital circuits and components will help

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